product brief september 2000 TSWC01622 sonet/sdh/pdh/atm clock synthesizer and protection switch features n fully-integrated clock synthesis n clock or sync protection switching n fast, autonomous switching with software-override capability n supports a wide choice of sonet/sdh/atm output clock frequencies: 622.08 mhz 155.52 mhz 77.76 mhz 51.84 mhz 44.736 mhz 38.88 mhz 34.368 mhz 32.768 mhz 24.704 mhz 19.44 mhz 16.384 mhz 8.192 mhz 4.096 mhz 2.43 mhz 2.048 mhz 1.544 mhz n supports multiple input clock frequencies: 51.84 mhz 38.88 mhz 19.44 mhz 8.192 mhz 6.48 mhz 2.048 mhz 1.544 mhz 8 khz n generates sync outputs at 8 khz aligned to an 8 khz input clock/sync n locks to backup reference clock if both working and protection reference clocks are lost n compatible with lucent technologies ttrn012g5 2.5 gbits/s mux/synthesizer, tdat042g5/ tadm042g5 sonet/atm/pos devices, tsot0410g, and tmxf28155 super mapper n single 3.3 v supply n supports multiple output levels: cmos, lvpecl, or lvds applications n sonet/sdh and pdh add/drop multiplexers n sonet/sdh and pdh cross connects n atm and packet over sonet switches and routers n sonet/sdh and pdh test equipment n remote access servers description the lucent technologies microelectronics group TSWC01622 is designed for a wide variety of syn- chronous timing applications. it serves as a clock synthesizer and low-skew clock fanout device gener- ating clocks at frequencies up to 622.08 mhz that are synchronized to the system reference clock. it also serves as an intelligent clock protection switch with fast, autonomous selection based on the presence of the two input clocks. alternatively, clock switching can be controlled entirely through a software inter- face. the TSWC01622 also delivers an output sync signal that is aligned to the input clock. if 8 khz system sync signals are applied as the clock a and clock b inputs, the TSWC01622 will generate an output sync signal that is phase-aligned to the selected input sync. a programmable phase offset is provided to allow the user to offset the output sync relative to the input sync. the output sync can be used for global align- ment of cells or frames in sonet/sdh/pdh cross connects or atm switch applications. the device allows flexible choices of lvds, lvpecl, or cmos input and output levels. the TSWC01622 is intended for clock distribution and protection switching on a line card, a switch card, or a shelf timing card. along with the wide vari- ety of input and output frequencies, a unique feature of the device is a guaranteed correct number of out- put clock cycles between output sync pulses before, during, and after a clock selection switching event. the number of clock cycles between sync pulses remains correct even during a switch between work- ing and protection clock sources that have an arbi- trary phase relationship between them. the TSWC01622 also solves the skew problem associ- ated with timing distribution over cable or backplane traces of different lengths. the block diagram is shown on the next page. note that the diagram is representative of device function- ality and conceptual signal flow. internal implementa- tion details may be different than shown.
TSWC01622 sonet/sdh/pdh/atm product brief clock synthesizer and protection switch september 2000 lucent technologies inc. reserves the right to make changes to the product(s) or information contained herein without notice. n o liability is assumed as a result of their use or application. no rights under any patent accompany the sale of any such product(s) or information. copyright ? 2000 lucent technologies inc. all rights reserved september 2000 pb00-144hspl for additional information, contact y our microelectronics group account mana g er or the followin g : internet: http://www.lucent.com/micro e-mail: docmaster@micro.lucent.com n. america: microelectronics group, lucent technolo g ies inc., 555 union boulevard, room 30l-15p-ba, allentown, pa 18109-3286 1-800-372-2447 , fax 610-712-4106 ( in canada: 1-800-553-2448 , fax 610-712-4106 ) asia pacific: microelectronics group, lucent technolo g ies sin g apore pte. ltd., 77 science park drive, #03-18 cintech iii, sin g apore 118256 tel. (65) 778 8833 , fax ( 65 ) 777 7495 china: microelectronics group, lucent technolo g ies ( china ) co., ltd., a-f2, 23/f, zao fon g universe buildin g , 1800 zhon g shan xi road, shan g hai 200233 p. r. china tel. (86) 21 6440 0468 , ext. 325 , fax ( 86 ) 21 6440 0652 japan: microelectronics group, lucent technolo g ies japan ltd., 7-18, hi g ashi-gotanda 2-chome, shina g awa-ku, tok y o 141, japan tel. (81) 3 5421 1600 , fax ( 81 ) 3 5421 1700 europe: data re q uests: microelectronics group dataline: tel. (44) 7000 582 368 , fax ( 44 ) 1189 328 148 technical in q uiries: germany: (49) 89 95086 0 ( munich ) , united kingdom: (44) 1344 865 900 ( ascot ) , france: (33) 1 40 83 68 00 ( paris ) , sweden: (46) 8 594 607 00 ( stockholm ) , finland: (358) 9 3507670 ( helsinki ) , italy: (39) 02 6608131 ( milan ) , spain: (34) 1 807 1441 ( madrid ) description ( continued ) 0795(f)r.1 figure 1. functional block diagram of TSWC01622 sdhsel[3:0] ck19 ck38 ck51 ck77 ck155n[1:0] ck155p[1:0] pck155n[1:0] pck155p[1:0] ck622n[1:0] ck622p[1:0] pck622n[1:0] pck622p[1:0] sypcln[1:0] sypclp[1:0] sylvsn[1:0] sylvsp[1:0] sync8k sydu syoffpos syoff[9:0] tstclkn tstclkp vbb vngates vc[p:n] lf[p:n] inlosn lsvco loop lf[2:0] rref monb mona pd divide loc divide sync offset dq based on sdhsel sonet clock gen. divide enable vco charge pd loss of control and switch state machine pdh clock gen. internal test control phase compare loss of divide rsva clkap clkan clka clkbp clkbn clkb sellvds finsel[3:0] rsvb clkbu fbusel[3:0] selclk selbun autoswn revertn swcontn ensqln enlon lorstn resetn swstate[1:0] int[8:0] ckpdh5 ckpdh4 ckpdh3 ckpdh2 ckpdh1 pdhsel[3:0] tstmode serclk serenbln serdat clock a loss of clock b by m divide by m divide by n clock backup test clock pump/ loop filter 38.88 mhz charge pump filter vcxo 38.88 mhz
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